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DirectFB success

Have a question about devices internals, memory layout, reverse engineering, etc---This is the place for anything so technical that it would cause a n00b's head to 'splode

Re: DirectFB success   

Postby macrule2001 » Wed Jan 05, 2011 11:53 am

Yes, but they vanished again. I think they were headers from the Sigma SDK. Before that they left some DFB ones in. Should they ever provide a working Qt all the better.
macrule2001
Developer
 
Posts: 22
Joined: Mon Nov 08, 2010 4:56 pm

Re: DirectFB success   

Postby macrule2001 » Wed Jan 05, 2011 2:41 pm

If anyone wants to play with this, here is how to compile QT (and Webkit, though it's unstable) (see http://forum.wdlxtv.com/viewtopic.php?f=43&t=3108&start=0 for background):

Download QtEmbedded sources and build like this:
Code: Select all
PKG_CONFIG_PATH=$BUILDROOT/usr/lib/pkgconfig sb2 ./configure -embedded generic -qt-gfx-directfb
sb2 make
sb2 -eR make install


I then mounted $BUILDROOT/usr/local on the WDTV as /usr/local and could start any of the QT examples like this:
Code: Select all
QWS_DISPLAY=directfb:bgcolor='#00000000' DFB_CONFIG_DIR=/etc CDROM_DEVICE_NAME=/dev/sr0 CDROM_MOUNT_POINT=/cdrom ENABLE_DEV_SUPPORT=1 /usr/local/Trolltech/Qt-4.7.1/examples/webkit/fancybrowser/fancybrowser -qws


(dmaosd must not be running when you try this, I disabled it in the startup scripts).

Then in a different session you can start a movie that should show behind the Qt windows:
Code: Select all
upnp-cmd SetAVTransportURI file:///tmp/media/usb/USBKEY/test.avi
upnp-cmd Play



Just for reference, here's how to build webkit:
Code: Select all
mkdir build
cd build
sb2 PKG_CONFIG_PATH=$BUILDROOT/usr/lib/pkgconfig \
CPPFLAGS='-mxgot -mlong-calls' \
../autogen.sh \
   --prefix=/usr \
   --with-target=directfb \
   --enable-optimizations   \
   --disable-debug \
   --disable-channel-messaging   \
   --disable-javascript-debugger   \
   --enable-offline-web-applications   \
   --enable-dom-storage   \
   --enable-database   \
   --disable-eventsource   \
   --disable-icon-database   \
   --enable-datalist   \
   --disable-video   \
   --enable-svg   \
   --enable-xpath   \
   --enable-xslt   \
   --enable-workers   \
   --disable-web-sockets   \
   --disable-jit
cp -Rp /usr/include/X11 $BUILDROOT/usr/include/
sb2 make
sb2 make install DESTDIR=$BUILDROOT


You will run into compile time errors that require tweaking the code. Since the end product doesn't work anyway, I won't list them here.
macrule2001
Developer
 
Posts: 22
Joined: Mon Nov 08, 2010 4:56 pm

Re: DirectFB success   

Postby Enabled » Fri Feb 04, 2011 8:16 am

macrule2001 wrote:I got some DirectFB examples to work surprisingly easy on the 1.03 firmware.

Thx for good news! But...

macrule2001 wrote:... dmaosd must not be running at the time...

killall dmaosd is enough?
Something goes wrong when starting simple test application (http://directfb.org/docs/DirectFB_Tutorials/simple.html)
Firmware 1.03.49_V_WDLXTV.COM_WDLXTV_LIVE-0.4.5.3.

Code: Select all
killall dmaosd
DFB_CONFIG_DIR=/etc CDROM_DEVICE_NAME=/dev/sr0 CDROM_MOUNT_POINT=/cdrom ENABLE_DEV_SUPPORT=1 ./a.out

(*) DirectFB/Config: Active DTV standard hdtv60
(*) DirectFB/Config: Active DTV signal 720p
(*) DirectFB/Config: Active DTV connector hdmi
(*) DirectFB/Config: Active Component standard hdtv60
(*) DirectFB/Config: Active Component signal 720p
(*) DirectFB/Config: Active DTV connector ycrcb
(*) DirectFB/Config: Active Analog standard ntsc
(*) DirectFB/Config: Active Analog signal ntsc
(*) DirectFB/Config: Active Analog connector cvbs
(*) DirectFB/Config: Driver options file /etc/sigmadfbrc
(*) DirectFB/Config: Active DTV standard hdtv60
(*) DirectFB/Config: Active DTV signal 720p
(*) DirectFB/Config: Active DTV connector hdmi
(*) DirectFB/Config: Active Component standard hdtv60
(*) DirectFB/Config: Active Component signal 720p
(*) DirectFB/Config: Active DTV connector ycrcb
(*) DirectFB/Config: Active Analog standard ntsc
(*) DirectFB/Config: Active Analog signal ntsc
(*) DirectFB/Config: Active Analog connector cvbs
(*) DirectFB/Config: Driver options file /etc/sigmadfbrc
(!) DirectFB/Config: Unable to open config file `/root/.directfbrc'!
(!) DirectFB/Config: Unable to open config file `/etc/directfbrc.a.out'!
(!) DirectFB/Config: Unable to open config file `/root/.directfbrc.a.out'!

     =======================|  DirectFB 1.0.0  |=======================
          (c) 2001-2007  The DirectFB Organization (directfb.org)
          (c) 2000-2004  Convergence (integrated media) GmbH
        ------------------------------------------------------------

(*) DirectFB/Core: Single Application Core. (2010-11-10) [ DEBUG ]
SYSTEM:ERROR:RUA splash screen clean up error 9
(!) System initialised
(!) DirectFB/irda: IR device /dev/ir could not be opened, retry in 1 second
    --> Input/output error
(*) Direct/Thread: Running 'IRDA Input' (INPUT, 5279)...
(*) DirectFB/Input: RC6 remote control 1.0 (SigmaDesigns)
(!) DirectFB/em86remote_tcp: could not bind server socket to port 30000    --> Address already in use
driver_get_available:1162, return 1
(!) DirectFB/linux_input: could not open device    --> No such device
(!) DirectFB/linux_input: could not grab device    --> Bad file descriptor
(!) DirectFB/linux_input: could not get LED bits    --> Bad file descriptor
linux_input_EventThread:877, bind sock = 7, ret = 0
(*) Direct/Thread: Running 'Linux Input' (INPUT, 5280)...
(*) DirectFB/Input:  0.1 (directfb.org)
DCCHD_LOG_CFG environment variable not set. Trying ./dcchdlog.cfg
Could not open debug configuration file: ./dcchdlog.cfg. Using default settings.
DEBUG ACTIVE MODULES: ALL
DEBUG ACTIVE LEVELS: CODE_ISSUE DATA_ISSUE FATAL UNEXPECTED
(!) Driver getting globals=0x4156b0
[17:50:30.765] [src/mem_mngr.c:383]


Platform configuration:
        DRAM0 = 112 MB, DRAM1 = 0 MB


[17:50:30.766] [src/mem_mngr.c:389] DCC-HD memory configuration:
        Unmapped: DRAM0 = 2.0 MB,       DRAM1 = 0.0 MB
        Mapped:   DRAM0 = 109.2 MB,     DRAM1 = 0.0 MB
[17:50:30.768] [src/mem_mngr.c:394] MMAP_DRAM0_UNMAPPED_BASE = 0x1, size 2049 KB
[17:50:30.769] [src/mem_mngr.c:394] MMAP_JPEG_BASE = 0x200007, size 0 KB
[17:50:30.770] [src/mem_mngr.c:394] MMAP_MONO_BASE = 0x200007, size 0 KB
[17:50:30.770] [src/mem_mngr.c:394] MMAP_MONO_EXT_BASE = 0x200007, size 0 KB
[17:50:30.771] [src/mem_mngr.c:394] MMAP_VIDEO_1_BASE = 0x200007, size 0 KB
[17:50:30.772] [src/mem_mngr.c:394] MMAP_AUDIO_0_BASE = 0x200007, size 0 KB
[17:50:30.772] [src/mem_mngr.c:394] MMAP_AUDIO_0_SHADOW_BASE = 0x200007, size 0 KB
[17:50:30.773] [src/mem_mngr.c:394] MMAP_AUDIO_1_BASE = 0x200007, size 0 KB
[17:50:30.773] [src/mem_mngr.c:394] MMAP_AUDIO_1_SHADOW_BASE = 0x200007, size 0 KB
[17:50:30.773] [src/mem_mngr.c:394] MMAP_DRAM0_MEMPOOL_UNMAPPED_BASE = 0x2, size 2049 KB
[17:50:30.773] [src/mem_mngr.c:394] MMAP_DEMUX_BASE = 0x3, size 1792 KB
[17:50:30.773] [src/mem_mngr.c:394] MMAP_DEMUX_OUTPUT_BASE = 0x6f00007, size 256 KB
[17:50:30.773] [src/mem_mngr.c:394] MMAP_MISC_BASE = 0x1c0003, size 256 KB
[17:50:30.773] [src/mem_mngr.c:394] MMAP_DRAM1_UNMAPPED_BASE = 0x6f40009, size 1 KB
[17:50:30.773] [src/mem_mngr.c:394] MMAP_VIDEO_0_BASE = 0x200007, size 0 KB
[17:50:30.773] [src/mem_mngr.c:394] MMAP_SPU_BASE = 0x200007, size 0 KB
[17:50:30.773] [src/mem_mngr.c:394] MMAP_VIDEO_2_BASE = 0x200007, size 0 KB
[17:50:30.773] [src/mem_mngr.c:394] MMAP_VIDEO_3_BASE = 0x200007, size 0 KB
[17:50:30.773] [src/mem_mngr.c:394] MMAP_VIDEO_4_BASE = 0x200007, size 0 KB
[17:50:30.773] [src/mem_mngr.c:394] MMAP_DRAM1_MEMPOOL_UNMAPPED_BASE = 0x6f4000b, size 1 KB
[17:50:30.774] [src/mem_mngr.c:394] MMAP_DRAM0_BASE = 0x200005, size 111873 KB
[17:50:30.774] [src/mem_mngr.c:394] MMAP_CPS_BASE = 0x200006, size 0 KB
[17:50:30.774] [src/mem_mngr.c:394] MMAP_DirectFB_BASE = 0x200006, size 111616 KB
[17:50:30.774] [src/mem_mngr.c:394] MMAP_DRAM0_MEMPOOL_BASE = 0x6f00006, size 257 KB
[17:50:30.774] [src/mem_mngr.c:394] MMAP_DRAM1_BASE = 0x6f4000d, size 1 KB
[17:50:30.774] [src/mem_mngr.c:394] MMAP_DRAM1_MEMPOOL_BASE = 0x6f4000f, size 1 KB
[17:50:30.774] [src/mem_mngr.c:394] MMAP_DCCHD_DATA_BASE = 0x6f00007, size 0 KB
[17:50:30.774] [src/mem_mngr.c:394] MMAP_IG_DB_BASE = 0x200007, size 0 KB
[17:50:30.774] [src/mem_mngr.c:394] MMAP_IG_PLANE_BASE = 0x200007, size 0 KB
[17:50:30.774] [src/mem_mngr.c:394] MMAP_PG_DB_BASE = 0x200007, size 0 KB
[17:50:30.774] [src/mem_mngr.c:394] MMAP_PG_EB_BASE = 0x200007, size 0 KB
[17:50:30.774] [src/mem_mngr.c:394] MMAP_PG_CB_BASE = 0x200007, size 0 KB
[17:50:30.774] [src/mem_mngr.c:394] MMAP_IG_CB_BASE = 0x200007, size 0 KB
[17:50:30.774] [src/mem_mngr.c:394] MMAP_TS_EB_BASE = 0x200007, size 0 KB
[17:50:30.774] [src/mem_mngr.c:394] MMAP_TS_FONT_BASE = 0x200007, size 0 KB
[17:50:30.774] [src/mem_mngr.c:394] MMAP_BDMV_SOUND_BASE = 0x200007, size 0 KB
[17:50:30.774] [src/mem_mngr.c:394] MMAP_PG_PLANE_BASE = 0x200007, size 0 KB
[17:50:30.774] [src/mem_mngr.c:394] MMAP_IG_EB_BASE = 0x200007, size 0 KB
[17:50:30.776] [src/mem_mngr.c:499] DCC-HD MRUA memory manager configuration:
        0x200002 DRAM 0 unmapped bytes (2.000002 MBs) at 0x8046e78c
        0 DRAM 1 unmapped bytes (0.000000 MBs) at 0
        0x6d40002 DRAM 0 mapped bytes (109.250000 MBs) at 0x8066eb8c
        0x6d40002 DRAM 1 mapped bytes (0.000000 MBs) at 0
[17:50:30.777] [src/mem_mngr.c:722] MRUA memory map ID MMAP_DRAM0_MEMPOOL_UNMAPPED_BASE (0x2) of size 0x200000 allocated at 0x8046e78c
[src/mem_mngr.c:1058] ! FAILED to retrieve address of memory map object ID 0x200006 - object not allocated!
[17:50:30.777] [src/mem_mngr.c:518]     0x200000 DRAM 0 unmapped bytes in memory pool at 0x8046e78c
[17:50:30.777] [src/mem_mngr.c:717] MRUA memory map ID MMAP_DRAM0_MEMPOOL_BASE (0x6f00006) of size 0x40000 allocated at 0x8736eb8c (virtual 0x34a12b8c)
[src/mem_mngr.c:1058] ! FAILED to retrieve address of memory map object ID 0x200006 - object not allocated!
[17:50:30.777] [src/mem_mngr.c:549]     0x40000 DRAM 0 bytes in memory pool at 0x8736eb8c
[17:50:30.777] [src/mem_mngr.c:717] MRUA memory map ID MMAP_CPS_BASE (0x200006) of size 0x6d00000 allocated at 0x8066eb8c (virtual 0x2dd12b8c)
(*) DirectFB/Graphics: SMP863x Software Rasterizer 0.1 (Sigma Designs)
(!) SMP863x: Error: could not open persistent HDCP SRM file: /mnt/sigma/hdcp.srm
(!) SMP863x: Error: could not open persistent HDCP SRM file for writing
(!) SMP863x: Error: Failed to store empty HDCP SRM in flash memory!
(!) Current pixel clock at digital output: 27000000 Hz
00:00:00.000 [hdmi_rua.c:351] [HDMI] WARNING! Please use hdmi_clear_context() to intialize the dh_context                                   
00:00:00.000 [hdmi_rua.c:457] [HDMI] Probing for HDMI core on internal bus.
00:00:00.000 [probe.c:85] [HDMI] Resetting internal HDMI core!
00:00:00.011 [probe.c:268] [HDMI] find: Detected preliminary part ID at I2C device address 0x72 sub addr 0x00: vendor 0x001C, device 0000, rev.0xF0
00:00:00.013 [probe.c:302] [HDMI] find: Detected part at I2C device address 0x72: vendor 0x001c, device 0000, rev.0xf0
00:00:00.014 [hdmi.c:278] [HDMI] Found chip 1 at 0x72
00:00:00.015 [probe.c:85] [HDMI] Resetting internal HDMI core!
00:00:00.026 [probe.c:268] [HDMI] find: Detected preliminary part ID at I2C device address 0x72 sub addr 0x00: vendor 0x001C, device 0000, rev.0xF0
00:00:00.029 [hdmi_rua.c:460] [HDMI] Found 1 HDMI core on internal bus.
00:00:00.030 [hdmi_rua.c:467] [HDMI] about to hdmi_open chip 0 at 0x72
00:00:00.031 [hdmi.c:318] [HDMI] Selecting internal chip at I2C device address 0x72
00:00:00.033 [probe.c:394] [HDMI] select: Detected part: vendor 0x001c, device 0000, rev.0xf0
00:00:00.034 [hdmi.c:178] [HDMI] ========================== creating pHDMI ==========================
00:00:00.036 [SLi.c:312] Bring SLi out of standby
00:00:00.037 [SLi.c:260]   PLL Reset Cycle, mode.a
00:00:00.042 [SLi.c:273]   PLL Reset Cycle, mode.b
00:00:00.044 [SLi.c:316] First call, determine SLi revision
00:00:00.044 [SLi.c:95] SLi13T Revision: 0.63, PHY 85 nm
00:00:00.044 [SLi.c:329] Bypassing PLL A in SLi PHY
00:00:00.046 [SLi.c:95] SLi13T Revision: 0.63, PHY 85 nm
00:00:00.046 [SLi.c:390] New mode: 0x28
00:00:00.046 [SLi.c:433] mode.b DDC timing setup from initial IDClk bypass: div=71 for a DDC clock of 95070 Hz
00:00:00.046 [hdmi.c:885] [HDMI] *** Power on ***
00:00:00.046 [hdmi_rua.c:485] [HDMI] Probing for HDMI chips on I2C bus.
00:00:00.049 [hdmi_rua.c:488] [HDMI] Found 0 HDMI chips on I2C bus.
00:00:00.050 [hdmi_rua.c:535] [HDMI] found 1 HDMI chip
00:00:00.052 [hdmi_rua.c:577] [HDMI] Probing for CEC chips on I2C bus.
00:00:00.054 [hdmi.c:443] [HDMI] Found internal CEC
00:00:00.055 [hdmi_rua.c:627] [HDMI] Opening CEC chip.
00:00:00.057 [hdmi.c:520] [HDMI] ========================== creating pCEC ==========================
00:00:00.059 [hdmi_rua.c:660] [CEC] Registering source device
00:00:00.059 [srm.c:57] hdmi_check_signature(0x432b20, 40, 0x432b18, 8)
  SRM Data[00]: 80 00 00 01 00 00 00 2B
  SRM Sig.[00]: D2 48 9E 49 D0 57 AE 31
  SRM Sig.[08]: 5B 1A BC E0 0E 4F 6B 92
  SRM Sig.[10]: A6 BA 03 3B 98 CC ED 4A
  SRM Sig.[18]: 97 8F 5D D2 27 29 25 19
  SRM Sig.[20]: A5 D5 F0 5D 5E 56 3D 0E
(*) Display params: -no_cp  -component -f 720p59 -cs yuv_709 -asp 16 9 -analog -f NTSC_M -cs yuv_601 -asp 16 9
00:00:00.229 [/var/andy/WDTV/branch_bungalow_1.03.43_B_SDK385wd0/src/libs/3_8_0/mrua_SMP8654F_3_8_5_wd-0_dev.mips/MRUA_src/samples/outports_options.c:1135] ASP: setting 16:9 on module id 12 with DisplayAspectRatio
00:00:00.247 [/var/andy/WDTV/branch_bungalow_1.03.43_B_SDK385wd0/src/libs/3_8_0/mrua_SMP8654F_3_8_5_wd-0_dev.mips/MRUA_src/samples/outports_options.c:1129] ASP: setting 16:9 on module id 51 with FrameInfoForce
(!!!)  *** WARNING [SMP863x: em86_get_analog_active_format_and_aspect: Parameters don't match any configuration; using defaults !
] *** [gfxdrivers/em86xx/em86xx_rules.c:1798 in em86_get_analog_active_format()]
(!!!)  *** WARNING [SMP863x: em86_get_analog_active_format_and_aspect: Parameters don't match any configuration; using defaults !
] *** [gfxdrivers/em86xx/em86xx_rules.c:1798 in em86_get_analog_active_format()]
(*) SMP863x: HDMI Checker Thread running (pid=5248)
(*) SMP863x: Output Reconfiguration Thread running (pid=5248)
(*) DirectFB/Core/WM: Default 0.3 (directfb.org)
(!) [Main Thread       0.000] ( 5248) *** Assumption [core != NULL] failed *** [src/core/core.c:461 in dfb_core_create_surface()]
(!) [Main Thread       0.000] ( 5248) *** Assumption [core != NULL] failed *** [src/core/surfaces.c:1154 in dfb_surface_init()]
(!) [Main Thread       0.000] ( 5248) *** Assumption [core != NULL] failed *** [src/core/core.c:598 in dfb_core_shmpool()]
(!) [Main Thread       0.000] ( 5248) *** Assumption [core != NULL] failed *** [src/core/core.c:617 in dfb_core_shmpool_data()]
00:00:00.448 [SLi.c:3100] [HDMI] *** HDMI mode ***
00:00:00.448 [SLi.c:3141] [HDMI] *** HotPlug change interrupt ***
00:00:00.448 [SLi.c:3146] [HDMI] *** Receiver change interrupt ***
00:00:00.448 [SLi.c:4063] [HDMI] *** Receiver differs, now on ***
00:00:00.448 [SLi.c:4069] [HDMI] *** Receiver on ***
00:00:00.449 [SLi.c:4072] [HDMI] *** HotPlug differs, now on ***
00:00:00.449 [SLi.c:4077] [HDMI] *** HotPlug on ***
00:00:00.449 [SLi.c:4085] [HDMI] *** Pixel Clock stable ***
00:00:00.449 [hdmi.c:962] [HDCP] Reached state H 1
00:00:00.449 [hdmi.c:993] [HDMI] *** HDMI mode ***
00:00:00.449 [hdmi.c:1142] Input Video Format is 0 bit YCbCr 4:4:4 601
00:00:00.449 [hdmi.c:1187] Output Video Format is 0 bit YCbCr 4:4:4 601
00:00:00.449 [hdmi.c:3256] [HDMI] [INFO FRAME] Sending NULL packets during VSync
00:00:00.449 [SLi.c:4577] Info frame, type 0x00, sent and enabled
00:00:00.450 [hdmi.c:1015] [HDMI] Sending null packets
00:00:00.450 [hdmi.c:2758] [HDMI] New blanking color: 0,0,0 with 0 bits
00:00:00.450 [hdmi.c:1621] [HDMI] HotPlug low-to-high, initiating EDID read.
00:00:00.450 [hdmi.c:1705] [HDMI] Reading EDID block 1.
    [HDMI] BusyStatus: [HR---IH--B]
00:00:00.450 [hdmi_loop.c:355] [HDMI] Switching to new active HDMI output, 1 of 1
00:00:00.450 [hdmi_loop.c:379] [CEC] Registering source device
00:00:00.451 [hdmi_loop.c:711] [HDMI] EDID error, invalidating...
[CEC] notification - [[[  Plugged  ]]]
00:00:00.464 [hdmi.c:1538] [HDMI] Application Change Request: HDCP Encryption off
00:00:00.464 [hdmi.c:1561] [HDMI] Application Change Request: Mute off
00:00:00.465 [hdmi.c:1662] [HDMI] EDID block 1 done.
00:00:00.465 [hdmi.c:1727] [HDMI] Done reading all of 1 EDID blocks.
EDID[0][00]: 00 FF FF FF FF FF FF 00
EDID[0][08]: 09 D1 D5 76 DD 14 00 00
EDID[0][10]: 0B 10 01 03 80 26 1E 78
EDID[0][18]: EA C5 C6 A3 57 4A 9C 23
EDID[0][20]: 12 4F 54 BD EF 80 71 4F
EDID[0][28]: 81 90 81 80 81 8C 01 01
EDID[0][30]: 01 01 01 01 01 01 30 2A
EDID[0][38]: 00 98 51 00 2A 40 30 70
EDID[0][40]: 13 00 78 2D 11 00 00 1E
EDID[0][48]: D5 09 80 A0 20 5E 63 10
EDID[0][50]: 10 60 52 08 78 2D 11 00
EDID[0][58]: 00 1A 00 00 00 FD 00 38
EDID[0][60]: 4C 1F 53 0E 00 0A 20 20
EDID[0][68]: 20 20 20 20 00 00 00 FC
EDID[0][70]: 00 42 65 6E 51 20 46 50
EDID[0][78]: 39 33 47 58 0A 20 00 80
    [HDMI]     Status: [HR---IHE-]
00:00:00.467 [hdmi_loop.c:475] HotPlug on, delaying report.
00:00:00.467 [hdmi_loop.c:562] [HDMI] Parsing new EDID with 1 blocks...
edid_parse,1015: echo "BNQ213118" > /tmp/tv_mode00:00:00.482 [hdmi_loop.c:590] hdmi_pending_loop,590
00:00:00.483 [hdmi_loop.c:42] [HDMI] Wrote EDID block 0 to file: RM_OK
00:00:00.483 [hdmi_loop.c:121] alpha_hdmi_save_vic,121
00:00:00.483 [hdmi_loop.c:66] 1280x1024P60-5:4
00:00:00.484 [hdmi_loop.c:66] 640x350P70-5:4
00:00:00.484 [hdmi_loop.c:86] alpha_hdmi_save_vsd,86
00:00:00.484 [hdmi_loop.c:187] alpha_hdmi_save_native,187
00:00:00.484 [hdmi_loop.c:66] 1280x1024P60-5:4
00:00:00.484 [hdmi_loop.c:595] hdmi_pending_loop,595
00:00:00.484 [hdmi_loop.c:600] [HDMI] EDID with 1 blocks parsed, supporting:
       DVI, RGB only, 24 bit color, no 3D.
       DTD 1280x1024p60.01 376:301 - Preferred
       DTD 640x350p70.15 376:301
edid_parse,1015: echo "BNQ213118" > /tmp/tv_mode[CEC] notification - [[[  Physical Address Discovery Completed  ]]]
00:00:00.500 [cec.c:1002]
  [CEC] Overview of all devices
  [CEC] =======================
  [CEC] This device:
  [CEC] * not yet registered
  [CEC] Other devices:
  [CEC] * no other devices found
  [CEC] =======================
[CEC] notification - [[[  Registration Completed  ]]]
00:00:00.631 [cec.c:521] [CEC] Send failed
00:00:00.731 [hdmi_loop.c:490] [HDMI]    ***   HotPlug Guard Time ended.
00:00:00.731 [hdmi_loop.c:501] [HDMI]    ***   Request Reconfiguration.
00:00:00.731 [hdmi_loop.c:504] [HDMI]    ***   Operational.
(*)
  HH  HH  HHHHH   HH   HH  HHHH      HHHH   HH   HH
  HH  HH  HH  HH  HHH HHH   HH      HH  HH  HHH  HH
  HHHHHH  HH  HH  HH H HH   HH      HH  HH  HH H HH
  HH  HH  HH  HH  HH   HH   HH      HH  HH  HH  HHH
  HH  HH  HHHHH   HH   HH  HHHH      HHHH   HH   HH

00:00:00.733 [hdmi_edid.c:312] Failed to get TVStandard from DTD, and use of VideoTiming was not permitted!
(!) SMP863x: First DTD does not match a TVStandard, skipping! (This is not good)
00:00:00.734 [hdmi_edid.c:312] Failed to get TVStandard from DTD, and use of VideoTiming was not permitted!                                 
00:00:00.748 [hdmi.c:1554] [HDMI] Application Change Request: HDMI Mode off
00:00:00.748 [hdmi.c:1038] [HDMI] hdmi_set_hdmi(DVI)
00:00:00.748 [SLi.c:2023] SLi: Setting HDMI 0
00:00:00.748 [hdmi.c:993] [HDMI] *** DVI mode ***
00:00:00.748 [hdmi.c:1142] Input Video Format is 0 bit YCbCr 4:4:4 601
00:00:00.748 [hdmi.c:1187] Output Video Format is 8 bit RGB 0..255
00:00:00.749 [hdmi.c:2758] [HDMI] New blanking color: 0,0,0 with 0 bits
    [HDMI]     Status: [------D--]
(*) SMP863X: Config cycle triggered by reconfig_thread !
(!!!)  *** WARNING [SMP863x: em86_get_analog_active_format_and_aspect: Parameters don't match any configuration; using defaults !         
] *** [gfxdrivers/em86xx/em86xx_rules.c:1798 in em86_get_analog_active_format()]
(!!!)  *** WARNING [SMP863x: em86_get_analog_active_format_and_aspect: Parameters don't match any configuration; using defaults !
] *** [gfxdrivers/em86xx/em86xx_rules.c:1798 in em86_get_analog_active_format()]
(*) Display params: -no_cp  -digital -hdmi_spd WDC WDTV STB -f HDMI_720p59 -cs rgb_0_255 -asp 16 9 -hdmi 0 -component -f 720p59 -cs yuv_709 -asp 16 9 -analog -f NTSC_M -cs yuv_601 -asp 16 9                                                                                           
00:00:00.790 [/var/andy/WDTV/branch_bungalow_1.03.43_B_SDK385wd0/src/libs/3_8_0/mrua_SMP8654F_3_8_5_wd-0_dev.mips/MRUA_src/samples/outports_options.c:860] [HDMI] ENABLE internal HDMI core
00:00:00.790 [/var/andy/WDTV/branch_bungalow_1.03.43_B_SDK385wd0/src/libs/3_8_0/mrua_SMP8654F_3_8_5_wd-0_dev.mips/MRUA_src/samples/outports_options.c:946] Digital Output setup: SDR, Inv. polarity, 0 pSec delay
00:00:00.798 [/var/andy/WDTV/branch_bungalow_1.03.43_B_SDK385wd0/src/libs/3_8_0/mrua_SMP8654F_3_8_5_wd-0_dev.mips/MRUA_src/samples/outports_options.c:4443] disable outport digital HDMI
[HDMI] Updating HDMI until TMDS is off.
00:00:00.799 [hdmi.c:1531] [HDMI] Application Change Request: TMDS off
[HDMI] TMDS is now off.
(!) DirectFB/irda: IR device /dev/ir could not be opened, retry in 1 second
    --> Input/output error
00:00:01.245 [/var/andy/WDTV/branch_bungalow_1.03.43_B_SDK385wd0/src/libs/3_8_0/mrua_SMP8654F_3_8_5_wd-0_dev.mips/MRUA_src/samples/outports_options.c:4470] setup outport digital HDMI
00:00:01.245 [/var/andy/WDTV/branch_bungalow_1.03.43_B_SDK385wd0/src/libs/3_8_0/mrua_SMP8654F_3_8_5_wd-0_dev.mips/MRUA_src/samples/outports_options.c:469] [HDMI] Display supports DVI, RGB only.
00:00:01.245 [/var/andy/WDTV/branch_bungalow_1.03.43_B_SDK385wd0/src/libs/3_8_0/mrua_SMP8654F_3_8_5_wd-0_dev.mips/MRUA_src/samples/outports_options.c:470] [HDMI] Display supports 24 bit color.
00:00:01.245 [/var/andy/WDTV/branch_bungalow_1.03.43_B_SDK385wd0/src/libs/3_8_0/mrua_SMP8654F_3_8_5_wd-0_dev.mips/MRUA_src/samples/outports_options.c:471] [HDMI] Display does not support YCbCr 4:4:4 deep color.
00:00:01.245 [/var/andy/WDTV/branch_bungalow_1.03.43_B_SDK385wd0/src/libs/3_8_0/mrua_SMP8654F_3_8_5_wd-0_dev.mips/MRUA_src/samples/outports_options.c:481] HDMI component depth auto conversion enabled
00:00:01.246 [hdmi.c:3106] [HDMI] ColorSpace conversion Disabled
00:00:01.246 [hdmi.c:3135] [HDMI] SamplingMode conversion Disabled
00:00:01.246 [hdmi.c:3159] [HDMI] ComponentBitDepth conversion to 8 bits Enabled
00:00:01.246 [/var/andy/WDTV/branch_bungalow_1.03.43_B_SDK385wd0/src/libs/3_8_0/mrua_SMP8654F_3_8_5_wd-0_dev.mips/MRUA_src/samples/outports_options.c:737] Digital Output towards HDMI: SDR, Inv. polarity, DE, 601, 24 bit bus with 12 bit components
00:00:01.247 [SLi.c:1344] hdmi_SLi_update_video: VSync Freqency is approx. 60 Hz
00:00:01.247 [SLi.c:1356] hdmi_SLi_update_video: Using DE pad
00:00:01.247 [SLi.c:1391] hdmi_SLi_update_video: Programming timing registers
00:00:01.247 [hdmi.c:1142] Input Video Format is 12 bit RGB 0..255
00:00:01.247 [hdmi.c:1187] Output Video Format is 8 bit RGB 0..255
00:00:01.247 [/var/andy/WDTV/branch_bungalow_1.03.43_B_SDK385wd0/src/libs/3_8_0/mrua_SMP8654F_3_8_5_wd-0_dev.mips/MRUA_src/samples/outports_options.c:746] [HDMI] Setting up DVI mode.
00:00:01.247 [/var/andy/WDTV/branch_bungalow_1.03.43_B_SDK385wd0/src/libs/3_8_0/mrua_SMP8654F_3_8_5_wd-0_dev.mips/MRUA_src/samples/outports_options.c:754] [HDMI] Enabling TMDS.
00:00:01.248 [hdmi.c:3834] hdmi_InfoFrame_AVI() DEPRECATED, use hdmi_packet_AVI() instead!
00:00:01.248 [hdmi.c:3544] [HDMI] [INFO FRAME] Not sending AVI Info Frames
00:00:01.248 [SLi.c:4582] Info frame, type 0x82, disabled
00:00:01.248 [/var/andy/WDTV/branch_bungalow_1.03.43_B_SDK385wd0/src/libs/3_8_0/mrua_SMP8654F_3_8_5_wd-0_dev.mips/MRUA_src/samples/outports_options.c:818] No HDMI monitor, can not send AVI info frames!
00:00:01.248 [/var/andy/WDTV/branch_bungalow_1.03.43_B_SDK385wd0/src/libs/3_8_0/mrua_SMP8654F_3_8_5_wd-0_dev.mips/MRUA_src/samples/outports_options.c:1135] ASP: setting 16:9 on module id 12 with DisplayAspectRatio
00:00:01.262 [/var/andy/WDTV/branch_bungalow_1.03.43_B_SDK385wd0/src/libs/3_8_0/mrua_SMP8654F_3_8_5_wd-0_dev.mips/MRUA_src/samples/outports_options.c:1129] ASP: setting 16:9 on module id 51 with FrameInfoForce
00:00:01.280 [hdmi_edid.c:312] Failed to get TVStandard from DTD, and use of VideoTiming was not permitted!
(!) SMP863x: First DTD does not match a TVStandard, skipping! (This is not good)
00:00:01.281 [hdmi_edid.c:312] Failed to get TVStandard from DTD, and use of VideoTiming was not permitted!                                 
(*) SMP863x: em86_configure_encoders: HDMI changed; presentation engine will reconfigure
00:00:01.281 [hdmi.c:3930] hdmi_InfoFrame_AVI_ColorSpace() DEPRECATED, use hdmi_packet_AVI_ColorSpace() instead!                           
00:00:01.281 [hdmi.c:3544] [HDMI] [INFO FRAME] Not sending AVI Info Frames
00:00:01.282 [SLi.c:4582] Info frame, type 0x82, disabled
00:00:01.282 [hdmi.c:3159] [HDMI] ComponentBitDepth conversion to 8 bits Enabled
00:00:01.298 [hdmi.c:1531] [HDMI] Application Change Request: TMDS on
00:00:01.298 [hdmi.c:1538] [HDMI] Application Change Request: HDCP Encryption off
00:00:01.298 [hdmi.c:1554] [HDMI] Application Change Request: HDMI Mode off
00:00:01.298 [hdmi.c:1038] [HDMI] hdmi_set_hdmi(DVI)
00:00:01.298 [SLi.c:2023] SLi: Setting HDMI 0
00:00:01.298 [hdmi.c:1561] [HDMI] Application Change Request: Mute off
00:00:01.298 [hdmi.c:1574] [HDMI] Application Change Request: Update ColorSpace SamplingMode ColorDepth Conversion
00:00:01.298 [hdmi.c:1142] Input Video Format is 12 bit RGB 0..255
00:00:01.298 [hdmi.c:1187] Output Video Format is 8 bit RGB 0..255
00:00:01.299 [SLi.c:1744] TMDS Progress State: 1
00:00:01.299 [hdmi.c:2839]   --- DVI MUTE ---
00:00:01.299 [SLi.c:969] hdmi_SLi_AVMute(1)
00:00:01.299 [SLi.c:948]   --- SLi A/V MUTE ---
00:00:01.299 [SLi.c:849] TMDS setup SLi: 19 00 40 AC 0E 3F 1F 31 04 (74.175 MHz (74.176 MHz setting), 8[8] bits per component, Chip Rev.63/85nm)
00:00:01.299 [SLi.c:873] SLi PLL A bypassed, single byte PHY param setup
00:00:01.300 [SLi.c:903] TMDS rdbck SLi: 19 00 40 AC 0E 3F 1F 31 04
00:00:01.300 [SLi.c:1761] TMDS Progress State: 2
00:00:01.300 [SLi.c:1765] SLi PLL A bypassed, no wait.
00:00:01.300 [SLi.c:1775] TMDS Progress State: 3
00:00:01.300 [SLi.c:1779] SLi PLL A bypassed, no wait.
00:00:01.300 [SLi.c:390] New mode: 0x48
00:00:01.302 [SLi.c:407] SLi PLL A bypassed, unresetting PLL B
00:00:01.303 [SLi.c:425] mode.d DDC timing setup from TMDS clk: div=195 for a DDC clock of 95097 Hz
00:00:01.303 [SLi.c:1790] TMDS Progress State: 4
00:00:01.313 [SLi.c:1800] SLi new state: 40
00:00:01.313 [SLi.c:372] Loading HDCP keys on SLi
00:00:01.313 [SLi.c:390] New mode: 0x80
00:00:01.314 [SLi.c:1809] TMDS Progress State: 5
00:00:01.329 [SLi.c:1818] SLi new state: 80
00:00:01.329 [SLi.c:1822] TMDS Progress State: 6
00:00:01.329 [hdmi.c:2839]   --- DVI UNMUTE ---
00:00:01.329 [SLi.c:969] hdmi_SLi_AVMute(0)
00:00:01.329 [SLi.c:948]   --- SLi A/V UNMUTE ---
00:00:01.329 [hdmi.c:2950]   --- DVI UNBLANK ---
00:00:01.329 [SLi.c:1842] TMDS Progress State: 7
(*) SMP863X: Config cycle triggered by reconfig_thread !
(!!!)  *** WARNING [SMP863x: em86_get_analog_active_format_and_aspect: Parameters don't match any configuration; using defaults !         
] *** [gfxdrivers/em86xx/em86xx_rules.c:1798 in em86_get_analog_active_format()]
(!!!)  *** WARNING [SMP863x: em86_get_analog_active_format_and_aspect: Parameters don't match any configuration; using defaults !
] *** [gfxdrivers/em86xx/em86xx_rules.c:1798 in em86_get_analog_active_format()]
00:00:01.438 [hdmi.c:1538] [HDMI] Application Change Request: HDCP Encryption off
00:00:01.438 [hdmi.c:1561] [HDMI] Application Change Request: Mute off
00:00:01.438 [SLi.c:1855] TMDS Progress State: 0
00:00:01.438 [hdmi.c:946] [HDMI] *** TMDS on ***
00:00:01.438 [hdmi.c:899] [HDCP] TMDS was just enabled. Waiting 0.5 s before first HDCP attempt.
00:00:01.438 [hdmi.c:1595] TMDS active, re-reading EDID
00:00:01.438 [hdmi.c:1705] [HDMI] Reading EDID block 1.
    [HDMI] BusyStatus: [----T----B]
00:00:01.462 [hdmi.c:1662] [HDMI] EDID block 1 done.
00:00:01.463 [hdmi.c:1727] [HDMI] Done reading all of 1 EDID blocks.
EDID[0][00]: 00 FF FF FF FF FF FF 00
EDID[0][08]: 09 D1 D5 76 DD 14 00 00
EDID[0][10]: 0B 10 01 03 80 26 1E 78
EDID[0][18]: EA C5 C6 A3 57 4A 9C 23
EDID[0][20]: 12 4F 54 BD EF 80 71 4F
EDID[0][28]: 81 90 81 80 81 8C 01 01
EDID[0][30]: 01 01 01 01 01 01 30 2A
EDID[0][38]: 00 98 51 00 2A 40 30 70
EDID[0][40]: 13 00 78 2D 11 00 00 1E
EDID[0][48]: D5 09 80 A0 20 5E 63 10
EDID[0][50]: 10 60 52 08 78 2D 11 00
EDID[0][58]: 00 1A 00 00 00 FD 00 38
EDID[0][60]: 4C 1F 53 0E 00 0A 20 20
EDID[0][68]: 20 20 20 20 00 00 00 FC
EDID[0][70]: 00 42 65 6E 51 20 46 50
EDID[0][78]: 39 33 47 58 0A 20 00 80
    [HDMI]     Status: [----T--E-]
00:00:01.464 [hdmi_loop.c:559] [HDMI] EDID is same a previous one, ignoring...
[CEC] notification - [[[  Logical Address Discovery Completed  ]]]
(!) DirectFB/irda: IR device /dev/ir could not be opened, retry in 1 second
    --> Input/output error
(!) DirectFB/irda: IR device /dev/ir could not be opened, retry in 1 second
    --> Input/output error
(!) DirectFB/irda: IR device /dev/ir could not be opened, retry in 1 second
    --> Input/output error
(!) DirectFB/irda: IR device /dev/ir could not be opened, retry in 1 second
    --> Input/output error
(*) Display params: -analog -f NTSC_M
00:00:05.852 [hdmi.c:3177] FATAL: Can not change PLL factor while TMDS is on!!!                                                             
00:00:05.852 [/var/andy/WDTV/branch_bungalow_1.03.43_B_SDK385wd0/src/libs/3_8_0/mrua_SMP8654F_3_8_5_wd-0_dev.mips/MRUA_src/samples/outports_options.c:1042] set agc=0 aps=0 cgmsa=0 rcd=0 asb=0 on module_id=19
00:00:05.852 [/var/andy/WDTV/branch_bungalow_1.03.43_B_SDK385wd0/src/libs/3_8_0/mrua_SMP8654F_3_8_5_wd-0_dev.mips/MRUA_src/samples/outports_options.c:4443] disable outport digital HDMI
[HDMI] Updating HDMI until TMDS is off.
00:00:05.852 [hdmi.c:1531] [HDMI] Application Change Request: TMDS off
00:00:05.852 [SLi.c:1744] TMDS Progress State: 10
00:00:05.852 [SLi.c:1866] TMDS Progress State: 11
00:00:05.852 [SLi.c:1884] Delayed 4523 mSec for propagation of "HDCP off"
00:00:05.852 [hdmi.c:2839]   --- DVI MUTE ---
00:00:05.853 [SLi.c:969] hdmi_SLi_AVMute(1)
00:00:05.853 [SLi.c:948]   --- SLi A/V MUTE ---
00:00:05.853 [SLi.c:1891] TMDS Progress State: 12
00:00:05.853 [hdmi.c:1758] [HDCP] Guard period has ended, starting HDCP.
00:00:05.853 [hdmi.c:1769] [HDCP] Reached state H 2, ready to start HDCP
(!) DirectFB/irda: IR device /dev/ir could not be opened, retry in 1 second
    --> Input/output error
00:00:06.103 [SLi.c:1909] Delayed 250 mSec for propagation of A/V-Mute
00:00:06.104 [SLi.c:1912] SLi could not send A/V-Mute before TMDS shutdown!
00:00:06.105 [SLi.c:1914] TMDS Progress State: 13
00:00:06.106 [SLi.c:1923] TMDS Progress State: 14
00:00:06.108 [SLi.c:1937] TMDS Progress State: 15
00:00:06.308 [SLi.c:390] New mode: 0x20
00:00:06.310 [SLi.c:394] SLi PLL A bypassed, Resetting PLLs A and B
00:00:06.314 [SLi.c:430] mode.b DDC timing setup from IDClk bypass: div=195 for a DDC clock of 95097 Hz
00:00:06.315 [SLi.c:1947] TMDS Progress State: 16
00:00:06.317 [SLi.c:1953] SLi new state: 28
00:00:06.319 [SLi.c:1957] TMDS Progress State: 0
00:00:06.320 [hdmi.c:946] [HDMI] *** TMDS off ***
00:00:06.321 [hdmi.c:906] [HDCP] Reached state H 1
    [HDMI]     Status: [----t----]
[HDMI] TMDS is now off.
00:00:06.728 [/var/andy/WDTV/branch_bungalow_1.03.43_B_SDK385wd0/src/libs/3_8_0/mrua_SMP8654F_3_8_5_wd-0_dev.mips/MRUA_src/samples/outports_options.c:1135] ASP: setting 4:3 on module id 12 with DisplayAspectRatio
(*) SMP863x: Closing HDMI chip 1
00:00:06.729 [SLi.c:390] New mode: 0x1C
00:00:06.729 [hdmi.c:885] [HDMI] *** Power off ***
[17:50:37.545] [src/mem_mngr.c:783] MRUA memory map ID MMAP_CPS_BASE (0x200006) released
[17:50:37.545] [src/mem_mngr.c:783] MRUA memory map ID MMAP_DRAM0_MEMPOOL_UNMAPPED_BASE (0x2) released
[17:50:37.545] [src/mem_mngr.c:783] MRUA memory map ID MMAP_DRAM0_MEMPOOL_BASE (0x6f00006) released
[17:50:37.547] [src/mem_mngr.c:942] DCC-HD MRUA memory allocator uninitalized
(!) System is going down !!
(!) System is down!!


Please help me! :)
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Re: DirectFB success   

Postby b-rad.cc » Fri Feb 04, 2011 8:24 am

no killing it is not enough, and I'd like to refer you to the description of this subforum.
Nitty Gritty forum description wrote:Have a question about devices internals, memory layout, reverse engineering, etc---This is the place for anything so technical that it would cause a n00b's head to 'splode. If you aren't comfortable with Linux, willing to get your hands wet, and able to hold your own, then you should only be observing. n00bish behaviour will be not be tolerated in this area and your privileges to view/post here will be taken away because of it.

This is not baby step land, this is I know how to do things myself ville.
PM's are for private matters only, please post public matters on the forum to help others who might have the same issue.
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Re: DirectFB success   

Postby danoo » Sun Jun 19, 2011 9:37 pm

macrule2001 wrote:Now that's better :D

Webkit with Gtk+ just wouldn't work reliably. I have a feeling it may be the cairo-directfb backend and/or alignment issues on mips, but that doesn't matter anymore.

What I did get to work is Qt-Embedded 4.7. It comes with its own Webkit component and I managed to run its example web browser in front of a playing movie. Most importantly, also the web page background can be set to transparent using CSS and lets the video shine through properly.

I think it's time to think about the architecture of the UI "web application". Everything WDTV-related should be abstracted in such a way, that the entire app can be run in any web browser for development/testing/modding. I guess it can easily be made to work on all such devices as long as a browser can be made to run.

I will post instructions on how to build it (and basically anything else) using scratchbox2 later in a new thread.


@macrule2001 : I'm just starting out with WD and actually I'm searching for a way to develop applicaitons, that render their own GUI, without the available OSD. I would really apreciate you sharing some insights on how you got Qt-Embedded 4.7 to work for WD. Any configs for crosscompilation ? How did you set up your dev environnement and what firmware version did you use?
using 1.03.49_V_WDLXTV.COM_EXT3-BOOT_LIVE-0.4.7.3
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Re: DirectFB success   

Postby RMerlin » Sun Jun 19, 2011 9:50 pm

He's using Scratchbox2. Check his SB2 thread in this forum for more info.
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Re: DirectFB success   

Postby CrashX » Mon Jun 20, 2011 4:33 am

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Re: DirectFB success   

Postby b-rad.cc » Tue Jun 21, 2011 7:42 am

I hate that POS site that requires you to register to view any threads...
PM's are for private matters only, please post public matters on the forum to help others who might have the same issue.
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Re: DirectFB success   

Postby RMerlin » Tue Jun 21, 2011 9:11 am

b-rad.cc wrote:I hate that POS site that requires you to register to view any threads...


The thread does show for me without having any account on that site. Odd.

It's essentially someone using cygwin and a mipsel toolchain for crosscompiling directFB for another device. Personally I wouldn't spend too much time on such a setup, as you will probably run into much more issues than inside a VM (file permissions for starter).

VirtualBox is free, and works awesomely well for VMs. A 512 MB VM running Debian or Ubuntu would be enough to crosscompile stuff, and be more reliable and less painful. And with qemu you can even run the bins you just crosscompiled before copying it to your WDTV.
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Re: DirectFB success   

Postby roberto1999 » Sun Jul 17, 2011 10:30 pm

Hi all,
I tried a lot to load direct.so library, via dlopen

Code: Select all
res =dlopen("libdirectfb.so", RTLD_LAZY);


but the answer in dlerror is several unresolved symbols in libdirectfb-smp86xx.so library.

The libdirectfb.so library depends on libdirectfb-smp86xx.so. I tried to open library libdirectfb-smp86xx.so (with RTLD_LAZY or RTLD_NOW flag)

Code: Select all
res =dlopen("libdirectfb-smp86xx.so", RTLD_LAZY);


but the result is the same.

Any tips? Thanks Roberto
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